Advanced HDL Synthesis and SOC Prototyping : RTL Design Using Verilog
by Vaibbhav Taraate Hardcover 2019
- Author: Vaibbhav Taraate
- ISBN 13: 9789811087752
- ISBN 10: 981108775X
- Publication Year: 2019
- Language: English
Specifications
Index-10981108775X
LanguageEnglish
Index-139789811087752
Period-
Class Track-
Publisher- (2019)
Pages-